Wafer Testing (also known as EDS - Electrical Die Sorting) is an elementary step in the production of any semiconductor structure and process technology. More specifically, after the integrated circuits are manufactured and before they are separated from the wafer, all individual electrical contacts are tested for functional defects according to specific electrical test patterns. This integrated circuit test (also known as CP - Circuit Probe) is performed by automated test units and requires a high level of reliability in the interface between the tester and the wafer contact pad. This interface is provided by probe cards and probe needles.
High demands are placed on the probe needles in the probe card. Due to the minimal pitch distances between the individual contact pads, they must be extremely straight and have excellent electrical conductivity. In addition, they must be sufficiently elastic and have good mechanical strength even at high temperatures to be used over many load cycles and touchdowns. The most important metric for probe card efficiency is to reduce the cost per test, the time per test and to increase the number of parallel tests while minimizing contamination (low contact resistance CRes).
Heraeus offers a wide range of probe pin materials from precipitation hardened PdAgCu alloys to high-strength PtNi alloys. Probe pin materials made by Heraeus can be applied for any probe card type: from cantilever to vertical to MEMS type and advanced probe cards with a consistently high quality standard.
Heraeus has led the way in the production of customized high-performance materials to the semiconductor industry for more than 50 years. In addition to many years of experience, Heraeus is your partner in identifying and processing the optimal material for your application. Furthermore, customers benefit from CCC/MAC testing as well as surface analysis.
1. We melt the alloy you need
2. We customize our products to your needs, from alloying to ultrafine wires
3. We innovate materials for your next-gen test equipment
Palysium is a Heraeus alloy developed specifically for semiconductor test applications. Due to its unique superlattice structure, Palysium has very high electrical conductivity (2.5 times higher than the PdAgCu market standard Hera 6321), combined with excellent spring properties and processing capabilities for wire diameters up to 15 μm.
This enables the production of very accurate and smaller needle sections that allow reliable testing of smaller pitch sizes, as significantly more current can be transmitted for the same cross-sectional area. At the same time, the needles can shrink considerably at the same current, which has a positive effect on pitch, needle count and test parallelism.
From standard materials to new metallurgical solutions of advanced alloys, the development focus is on good spring properties, high conductivity, and high durability, with mechanical properties adjustable to individual requirements.
Hera 648 |
Hera 6321 |
Palysium |
Hera 1206 |
Hera 5270 |
Hera 4000 |
|
---|---|---|---|---|---|---|
Main Components [wt%] | Pd35 Ag30 Au10 Pt10 | Pd39 Ag29 | Pd52 Ag11 | Pt Ni31.5 | Rh dot | Ir |
Density [g/cm-3] | 11.8 | 10.4 | 10.5 | 15.1 | 12.4 | 22.56 |
Young’s Modulus [GPa] | 108 | 112 | 120 | 234 | 330 | 528 |
Yield Strength Rp0,2 [MPa] | 1050 - 1400 | 1250 - 1550 | 1250 - 1550 | 1900 | 2800 | 2300 |
UTS [MPa] | 1100 - 1450 | 1300 - 1600 | 1300 - 1600 | 1600 - 2000 | 2100 - 2900 | 2400 |
Rp0,2/E [Ratio] | 0.010 - 0.013 | 0.011 - 0.014 | 0.011 - 0.013 | 0.008 | 0.008 | 0.004 |
Hardness [HV] | 330 - 400 | 400 - 450 | 400 - 500 | 400 - 490 | 450 - 700 | 700 |
Thermal Conductivity [W/mK] | 28 | 66 | 150 | 150 | 59 | |
Electrical Resistivity [μ0hm/cm] | 35.9 - 33.2 | 21.3 - 12.3 | < 6.4 | 41.1 - 33.2 | < 5.4 | 7.2 - 6.6 |
IACS [%] | 4.8 – 5.2 | 8.1 – 14.0 | > 27 | 4.2 – 5.2 | > 32 | 24 - 28 |
CCC [mA] | 380 | 590 | 650 | |||
MAC [mA] | 290 | 506 | 540 | |||
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